3 articles with this tag
Contactless in 300ms: Kernels, the TTQ, and the Tap
A tap has a latency budget a chip dip never had, and EMV contactless spends it differently: a PPSE combination-selection step, six scheme kernels (and the new unified C-8), and the Terminal Transaction Qualifiers (tag 9F66) that tell the card how this reader wants to be paid. A byte-by-byte guide to the fast path.
The TVR, the TSI, and How a Terminal Decides to Decline You
The Terminal Verification Results (tag 95) and Transaction Status Information (tag 9B) are the two bit fields that decide whether your card is approved offline, sent online, or declined. A byte-by-byte decode plus the exact AND logic — IAC and TAC against the TVR — that produces the verdict.
What Actually Happens When You Dip a Chip: The EMV Transaction Flow End-to-End
A Staff+ walkthrough of a single contact EMV transaction — SELECT, GPO, READ RECORD, offline data authentication, cardholder verification, risk management, and the cryptogram — with the real APDUs and the tags that carry the state.
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